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INTEGRAL AND gate, NOT ON THE BASIS OF THREE-DIMENSIONAL Layered Nanostructures

机译:整体和门,不是基于三维分层纳米结构

摘要

FIELD: electricity.;SUBSTANCE: in the integral logical AND-NOT element based on a layered three dimensional nanostructure (the element containing the first and the second logical transistors, the first and the second injecting transistors and a substrate) the logical structure is designed to be nanosized with a stepped profile.;EFFECT: increased response speed and reduced power consumption.;18 dwg
机译:领域:电力;物质:在基于层状三维纳米结构的集成逻辑与非元件(包含第一和第二逻辑晶体管,第一和第二注入晶体管以及衬底的元件)中,设计逻辑结构效果:提高响应速度并降低功耗。; 18 dwg

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