MULTIPROCESSOR SYSTEM AND SYNCHRONIZATION METHOD FOR MULTIPROCESSOR SYSTEM

摘要

PROBLEM TO BE SOLVED: To provide a multiprocessor system for achieving highly efficient barrier synchronization processing.;SOLUTION: A barrier write register BARW and a barrier read register BARR are disposed in each of processors CPU#0 to #7, and each BARW is wired to each BARR by using an exclusive wiring block WBLK3. For example, the BARW of one bit of the CPU#0 is connected via a WBLK3 to the first bit of each BARR of 8 bits included in the CPU#0 to #7, and the BARW of one bit of the CPU#1 is connected via the WBLK3 to the second bit of each BARR of 8 bits included in the CPU#0 to #7. For example, the CPU#0 writes information in its own BARW to notify the CPU#1 to #7 of synchronization standby, and the CPU#0 reads its own BARR to recognize whether or not the CPU#1 to #7 are put in the stand-by state. Therefore, it is not necessary to make any exclusive instruction in accordance with barrier synchronization processing, and it is possible to quickly achieve processing.;COPYRIGHT: (C)2013,JPO&INPIT