The iterative method rejisutaanarogu digital converter which has integral calculus non-linear characteristic revision

摘要

The iterative method register (SAR) the analog digital converter (ADC) (10) it is decreased integral calculus non-linear characteristic in (INL) error, each conductor (13) the revision capacitor which possesses the 1st terminal which is connected (HB) by offering, the conductor (13), CDAC (HA) reaches to one terminal of the capacitor and the comparator of SAR ADC (5) is connected to also input. The INL error information which store is done (18A), in order to decrease INL error, responding to the INL error information which store is done, in order ground voltage (GND) or reference voltage (VREF) to connect those selectively to in each case, it is used in order to control the switch which is connected to the 2nd terminal of the revision capacitor.