EQUALIZATION CONTROL CIRCUIT, POWER STORAGE DEVICE WITH THE EQUALIZATION CONTROL CIRCUIT, EQUALIZATION CONTROL TIME COMPUTATION METHOD AND DETERIORATION DETERMINATION METHOD

摘要

PROBLEM TO BE SOLVED: To provide an equalization control circuit in which a frequency of performing equalization control can be reduced, without generating a voltage difference between cells after the equalization control, by performing the equalization control of a cell voltage while considering a difference of capacitance to cell voltages of power storage cells.SOLUTION: An equalization control circuit comprises a resistor for equalization control and a switch for equalization control which are connected in parallel to a plurality of power storage cells, respectively. The equalization control circuit further comprises a cell voltage detection circuit for detecting cell voltages of the plurality of power storage cells, respectively, an equalization cell selection circuit for controlling the equalization control switch, and an arithmetic processing unit for controlling the equalization cell selection circuit. The arithmetic processing unit computes an adjustment time based on the measured cell voltages of the plurality of power storage cells and data for adjustment time computation, stored in the arithmetic processing unit beforehand, indicating a relation between the cell voltages of the power storage cells and capacitance, and performs equalization control by turning on the equalization control switch connected in parallel to an adjustment object cell to perform the equalization control thereon, among the power storage cells, just for the adjustment time.