PROBLEM TO BE SOLVED: To provide a method of analyzing precise carrier profile in a semiconductor device.;SOLUTION: A carrier profile analysis method includes: a voltage application step in which a voltage V is applied to a semiconductor device having an area S of a junction interface between two different-types of layers for forming a depletion layer region; a capacitance measurement step for measuring capacitance C of the semiconductor device; and a carrier profile calculation step in which a depletion layer width WD is calculated based on any one of following formulas (1) and (3), by using the area S, a dielectric constant ε which is determined from constituting materials of the different-types layers for the depletion layer width WD, the voltage V, and the capacitance C, then carrier density ρ(WD) is calculated based on any one of following formulas (2) and (4): where, 1. WD=εS/C, 2. ρ=-[C3/eεS2]*dV/dC-C2V/eεS2, 3. WD=Sε/[C+V*dC/dV], and 4. ρ=-[1/eεS2]*[C+V*dC/dV]3*[2dC/dV+V*d2C/dV2]-1.;COPYRIGHT: (C)2013,JPO&INPIT
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机译:解决的问题:提供一种分析半导体器件中精确载流子分布的方法。解决方案:载流子分布分析方法包括:电压施加步骤,其中将电压V施加到面积为S的半导体器件上。两种不同类型的层之间的结界面,用于形成耗尽层区域;电容测量步骤,用于测量半导体器件的电容C;载流子分布计算步骤,其中,通过使用面积S,基于以下公式(1)和(3)中的任何一个来计算耗尽层宽度W D Sub>。由耗尽层宽度W D Sub>,电压V和电容C的不同类型层的构成材料确定,则载流子密度ρ(W D Sub>)为根据以下公式(2)和(4)中的任何一个计算:其中,1. WD =εS/ C,2.ρ=-[C 3 Sup> /eεS 2 Sup >] * dV / dC-C 2 Sup> V /eεS 2 Sup>,3。WD =Sε/ [C + V * dC / dV]和4.ρ=- [1 /eεS 2 Sup>] * [C + V * dC / dV] 3 Sup> * [2dC / dV + V * d 2 Sup> C / dV 2 Sup>] -1 Sup> .;版权所有:(C)2013,日本特许厅&INPIT
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