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Being the deadlock detector which detects the deadlock

机译:作为检测死锁的死锁检测器

摘要

PROBLEM TO BE SOLVED: To provide a deadlock detection circuit for accurately detecting a deadlock state without erroneous detection.;SOLUTION: The deadlock detection circuit detects the deadlock state of a PLL circuit and includes: a PLL incorporated frequency divider for frequency-dividing the output signals of the voltage controlled oscillator of the PLL circuit and outputting a first frequency division clock; a feedback frequency divider for frequency-dividing the output signals of the voltage controlled oscillator and outputting a second frequency division clock to be a feedback clock to the phase comparator of the PLL circuit; and an erroneous lock detection circuit for outputting a determination signal indicating whether or not it is in the deadlock state on the basis of the clock number of the second frequency division clock included in a prescribed period determined by the cycle of the first frequency division clock.;COPYRIGHT: (C)2010,JPO&INPIT
机译:解决的问题:提供一种死锁检测电路,用于准确地检测死锁状态而不会错误检测。解决方案:死锁检测电路检测PLL电路的死锁状态,包括:PLL内置分频器,用于对输出进行分频锁相环电路的压控振荡器的信号并输出​​第一分频时钟;反馈分频器,用于对压控振荡器的输出信号进行分频,并输出第二分频时钟作为反馈时钟至PLL电路的相位比较器;错误锁定检测电路,用于基于由第一分频时钟的周期确定的规定时间段中包括的第二分频时钟的时钟号,输出指示其是否处于死锁状态的确定信号。 ;版权:(C)2010,JPO&INPIT

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