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Soft-output decoder, iterative decoding apparatus, and a soft decision value calculation method

机译:软输出解码器,迭代解码设备和软判定值计算方法

摘要

Making the operational quantity which is required for likelihood calculation small, the soft output decoder which can assure the reduction of miniaturization of the operational circuit and processing delay time. This soft output decoder (100), the calculation section (101), the timing regulator (102,103), the calculation section (104), and the calculation section (110) it has, the calculation section (110), the decision decoding section (111), is defeated hard and the likelihood calculation section (112), wins and the likelihood memory section (113), and the subtracter (114) has, the plural likelihood which are required in the Max log MAP decoder it wins and distinguishes to likelihood and being defeated likelihood, is defeated and calculates only likelihood. In addition, it wins and the decision which consecutively specifies decoding section (111) it uses the state which maximum likelihood pass passes as the method of distinguishing likelihood and being defeated likelihood, hard.
机译:软输出解码器可以减小似然计算所需的运算量,从而可以确保运算电路的小型化和处理延迟时间的减少。该软输出解码器(100),计算部(101),定时调节器(102,103),计算部(104)以及计算部(110),计算部(110),判定解码部具有(111),失败,似然度计算部分(112)获胜,似然度存储部分(113),减法器(114)在Max log MAP解码器中需要获胜并区分多个似然度。对可能性和被击败的可能性,被击败并仅计算可能性。另外,作为区分似然性和失败似然性的方法,使用最大似然通过所经过的状态来胜出并连续指定解码单元(111)的决定是困难的。

著录项

  • 公开/公告号JP5116677B2

    专利类型

  • 公开/公告日2013-01-09

    原文格式PDF

  • 申请/专利权人 パナソニック株式会社;

    申请/专利号JP20080530907

  • 发明设计人 本塚 裕幸;

    申请日2007-08-21

  • 分类号H03M13/45;H03M13/29;

  • 国家 JP

  • 入库时间 2022-08-21 16:53:18

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