LOW NOISE ESD PROTECTION FOR SOCs WITH ANALOG OR RADIO FREQUENCY DEVICES

摘要

Systems and methods are disclosed to reduce pin count in an integrated circuit with digital and analog circuits on-chip by receiving power (VDD) input at a digital power input pad that provides electrostatic discharge (ESD) protection but substantially no current for on-chip analog circuits; filtering noise from the digital power input pad with a filter; and coupling a low noise analog power input pad internal to the integrated circuit to the filter and an analog circuit or a low noise singled ended radio frequency circuit without requiring an external analog power pin.