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SYSTEMS AND METHODS FOR 1553 BUS OPERATION SELF CHECKING

机译:用于1553公交车运行自检的系统和方法

摘要

Systems and methods for 1553 bus operation self checking are provided. In one embodiment, a fault tolerant computer comprises a self-checking processor pair that includes a master processor, a checking processor, and self-checking pair logic; a 1553 bus transceiver; and a device comprising 1553 self-checking logic coupled between the self-checking processor pair and the 1553 bus transceiver, wherein the 1553 self-checking logic manages data communication between the 1553 bus transceiver and the self-checking processor pair. The 1553 self-checking logic includes a primary logic and a secondary logic that operate in lock-step. When the 1553 self-checking logic writes data to the 1553 bus transceiver, the 1553 self-checking logic compares a first 1553 formatted message generated by the primary logic to a second 1553 formatted message generated by the secondary logic, and generates an error indication when the first 1553 formatted message does not match the second 1553 formatted message.
机译:提供了用于1553总线操作自检的系统和方法。在一个实施例中,一种容错计算机包括自检处理器对,该自检处理器对包括主处理器,检查处理器和自检对逻辑。 1553总线收发器;包括耦合在自检处理器对和1553总线收发器之间的1553自检逻辑的设备,其中1553自检逻辑管理1553总线收发器与自检处理器对之间的数据通信。 1553自检逻辑包括以锁步方式操作的主逻辑和辅助逻辑。当1553自检逻辑将数据写入1553总线收发器时,1553自检逻辑将主逻辑生成的第一条1553格式化消息与副逻辑生成的第二1553格式化消息进行比较,并在以下情况下产生错误指示:第一个1553格式化的消息与第二个1553格式化的消息不匹配。

著录项

  • 公开/公告号US2012304017A1

    专利类型

  • 公开/公告日2012-11-29

    原文格式PDF

  • 申请/专利权人 KENNETH LEE MARTIN;

    申请/专利号US201113114673

  • 发明设计人 KENNETH LEE MARTIN;

    申请日2011-05-24

  • 分类号G06F11/26;

  • 国家 US

  • 入库时间 2022-08-21 16:47:02

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