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Method and apparatus for implementing cross-talk based booster wires in a system on a field programmable gate array
Method and apparatus for implementing cross-talk based booster wires in a system on a field programmable gate array
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机译:在现场可编程门阵列上的系统中实现基于串扰的增强线的方法和装置
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摘要
A method for designing a system on a field programmable gate array (FPGA) includes routing one or more booster wires alongside an interconnect to reduce a delay of a signal being transmitted on the interconnect. According to one aspect of the present invention, the routing of the one or more booster wires is performed in response to determining that a timing requirement of the system has not been met.
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