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Pipelined microprocessor with fast non-selective correct conditional branch instruction resolution
Pipelined microprocessor with fast non-selective correct conditional branch instruction resolution
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机译:具有快速非选择性正确条件分支指令解析的流水线微处理器
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摘要
A microprocessor includes a pipeline of stages for processing instructions and first and second types of conditional branch instruction includable by a program. The microprocessor makes a prediction of conditional branch instructions of the first type and flushes the pipeline of instructions if the prediction is subsequently determined to be incorrect, thereby incurring a branch misprediction penalty related to processing of conditional branch instructions of the first type. The microprocessor always correctly resolves conditional branch instructions of the second type without making a prediction of conditional branch instructions of the second type, thereby avoiding ever incurring a branch misprediction penalty related to processing of conditional branch instructions of the second type.
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