首页> 外国专利> Vector processor with plural arithmetic units for processing a vector data string divided into plural register banks accessed by read pointers starting at different positions

Vector processor with plural arithmetic units for processing a vector data string divided into plural register banks accessed by read pointers starting at different positions

机译:具有多个运算单元的矢量处理器,用于处理矢量数据串,该矢量数据串分为多个寄存器组,这些寄存器组由从不同位置开始的读取指针访问

摘要

It is an object to speed up a vector store instruction on a memory that is divided into banks as setting a plurality of elements as a unit while minimizing an increase in physical quantity. A vector processing apparatus has a plurality of register banks and processes a data string including a plurality of data elements retained in the plurality of register banks, wherein: the plurality of register banks each have a read pointer 113 that points to a read position for reading the data elements; and the start position of the read pointer 113 is changed from one register bank to another. For example, consecutive numbers assigned to the register banks may be used as the read start positions of the respective register banks.
机译:一个目的是在将物理量的增加最小化的同时,通过将多个元素设置为单位来加速在被划分为存储体的存储器上的向量存储指令。向量处理设备具有多个寄存器组,并且处理包括保留在多个寄存器组中的多个数据元素的数据串,其中:多个寄存器组各自具有读取指针 113 ,该指针指向用于读取数据元素的读取位置;并且读取指针 113 的开始位置从一个寄存器组更改为另一个。例如,分配给寄存器组的连续编号可以用作各个寄存器组的读取开始位置。

著录项

  • 公开/公告号US8316215B2

    专利类型

  • 公开/公告日2012-11-20

    原文格式PDF

  • 申请/专利权人 NORITAKA HOSHI;

    申请/专利号US20080529892

  • 发明设计人 NORITAKA HOSHI;

    申请日2008-03-07

  • 分类号G06F15/80;

  • 国家 US

  • 入库时间 2022-08-21 16:43:43

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