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Magnetic memory sensing circuit

机译:磁记忆检测电路

摘要

A sensing circuit includes a sense amplifier circuit having a first and second nodes through which a magnetic memory element is sensed. A first current source is coupled to the first node a second current source is coupled to the second node. A reference magnetic memory element has a resistance associated therewith and is coupled to the first node, the reference magnetic memory element receives current from the first current source. At least one memory element, having a resistance associated therewith, is coupled to the second node and receives current from the second current source. Current from the first current source and current from the second current source are substantially the same. The logic state of the at least one memory element is sensed by a comparison of the resistance of the at least one memory element to the resistance of the reference magnetic memory element.
机译:感测电路包括具有第一和第二节点的感测放大器电路,通过第一和第二节点感测磁存储元件。第一电流源耦合到第一节点,第二电流源耦合到第二节点。参考磁存储元件具有与其相关联的电阻,并且耦合到第一节点,参考磁存储元件从第一电流源接收电流。具有与其相关联的电阻的至少一个存储元件耦合到第二节点并且从第二电流源接收电流。来自第一电流源的电流和来自第二电流源的电流基本相同。通过将至少一个存储元件的电阻与参考磁性存储元件的电阻进行比较来感测至少一个存储元件的逻辑状态。

著录项

  • 公开/公告号US8363457B2

    专利类型

  • 公开/公告日2013-01-29

    原文格式PDF

  • 申请/专利权人 PARVIZ KESHTBOD;

    申请/专利号US20080125866

  • 发明设计人 PARVIZ KESHTBOD;

    申请日2008-05-22

  • 分类号G11C11/00;

  • 国家 US

  • 入库时间 2022-08-21 16:43:15

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