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Efficient clocking scheme for a bidirectional data link
Efficient clocking scheme for a bidirectional data link
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机译:双向数据链路的高效时钟方案
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摘要
A method for communication via a bidirectional data link between a processing device and a memory device. The memory device includes a clock source to generate a clock signal for driving a latching at the memory device of data to and/or from the bidirectional data link. The memory device provides the clock signal to the processing device for driving a latching at the processing device of data to and/or from the bidirectional data link.
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