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ADC for cancelling column fixed pattern noise and CMOS image sensor using it
ADC for cancelling column fixed pattern noise and CMOS image sensor using it
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机译:用于消除列固定图案噪声的ADC和使用该ADC的CMOS图像传感器
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摘要
This invention relates to the ADC for removing fixed pattern noise, the input voltage (V IN ) and compared to a constant increase ramp (Ramp) input has a slope with time, and a comparison unit for comparing the results output to the sync shift output; Sync shift unit for shifting the block sync signal on the basis of C-FPN C-FPN removal information received from the memory for the removal and the comparison result of the comparison section; n-bit counter which outputs a memory for the n-bit digital counter output value of the n-bit memory or C-FPN elimination; n-bit memory for storing the sync signal by using the shifted digital counter output value of the n-bit counter; And a digital counter output value of the n-bit counter corresponding to the reference voltage comprises a C-FPN removal for a memory block to provide the sync shift unit, characterized in that the sync signal is a signal used to determine the output value of the n-bit digital counter counter with and, by solving the transformation characteristic difference between the column ADC, may implement the enhanced image can be removed from the C-FPN properties of CIS. ;
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机译:本发明涉及用于消除固定模式噪声,输入电压(V IN Sub>)并与具有时间的斜率的恒定增加斜坡(Ramp)输入进行比较的ADC,以及用于比较结果输出到同步移位输出;同步移位单元,用于基于从用于删除的存储器中接收的C-FPN的C-FPN去除信息和比较部分的比较结果来移位块同步信号; n位计数器输出一个存储器,用于n位数字计数器的输出值或n位存储器的C-FPN消除; n位存储器,用于通过使用n位计数器的移位数字计数器输出值来存储同步信号;并且,与基准电压相对应的n位计数器的数字计数器输出值包括用于存储块的C-FPN去除,以提供同步移位单元,其特征在于,同步信号是用于确定信号的输出值的信号。通过解决列ADC之间的转换特性差异,可以实现n位数字计数器,并且可以从CIS的C-FPN属性中删除增强的图像。 ;
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