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Design simulator using Impedance test method for the signal fidelity in PCB Tracks

机译:使用阻抗测试方法设计仿真器以实现PCB轨道中的信号保真度

摘要

PURPOSE: A design simulator using an impedance calculation method for signal fidelity in a printed circuit board track is provided to develop a control impedance calculation tool, thereby easily performing experience or a passive impedance calculation method. CONSTITUTION: When a profile of a coupon class is selected by a user, circuit width of a printed circuit board(PCB) and an insulation layer interval are adjusted and a coupon is manufactured(S1, S2). Properties of a process are found by repetitively performing a test and measurement and control impedance of the PCB is calculated(S3). The test is repeated by changing values of track width and track thickness in the PCB and work, which finds process variables suitable for requirements of a designer, is repeated, designed and stored(S4). [Reference numerals] (AA) Start; (BB) End; (S1) Profile selection; (S2) Coupon manufacture; (S3) Control impedance calculation; (S4) Changing design by changing track width(W) and track thickness(h); (S5) Storing data
机译:目的:提供一种使用阻抗计算方法实现印刷电路板轨道信号保真度的设计仿真器,以开发控制阻抗计算工具,从而轻松执行经验或采用被动阻抗计算方法。组成:当用户选择了优惠券类别的配置文件时,将调整印刷电路板(PCB)的电路宽度和绝缘层间隔,并制造优惠券(S1,S2)。通过重复进行测试和测量来发现工艺的性质,并计算PCB的控制阻抗(S3)。通过更改PCB中的走线宽度和走线厚度的值来重复测试,并重复工作,查找和设计出适合设计人员要求的工艺变量(S4)。 [参考数字](AA)开始; (BB)结束; (S1)配置文件选择; (S2)优惠券制造; (S3)控制阻抗计算; (S4)通过改变轨道宽度(W)和轨道厚度(h)来改变设计; (S5)储存资料

著录项

  • 公开/公告号KR101303570B1

    专利类型

  • 公开/公告日2013-09-09

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR20110060203

  • 发明设计人 윤달환;오선진;

    申请日2011-06-21

  • 分类号G06F9/455;

  • 国家 KR

  • 入库时间 2022-08-21 16:24:33

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