DEVICE iterative decoding of block turbo code and the SISO decoder for ITS IMPLEMENTATION

摘要

1. Apparatus iterative turbo decoding block comprising first, second and third memory blocks, SISO decoder decision unit, whose input is connected to the first output SISO decoder, and an output connected to the input of the third memory unit, whose output is an output device, and the input device is input of the first memory block, characterized in that it introduced multiplier, the first and second restrictors, the permanent memory unit, the output of the first block RAM Connectivity li ne to the input of a first limiter, whose output is connected to the input of the permanent memory unit, whose output is connected to the first input of the multiplication unit, a second input coupled to an output of the second block of RAM, and an output connected to the input of the second limiter, whose output is connected to the input SISO decoder , the second output of which is connected to the input of the second operational unit pamyati.2. The apparatus according to claim 1, characterized in that the SISO decoder comprises a RAM, a clock generator, a key counter, a permanent memory unit, the function generator signals Walsh coefficients generator analyzed sequence, a first adder, a first subtractor, multiplier unit by two, multiplication block, the first block division, a second adder, a third adder, a second subtractor, the second dividing unit, a third dividing unit, the stopper, the input memory unit is the input SISO decoder successively with a clock generator of the connections, respectively and key counter, the counter output is connected to the address input of the zooming function coefficients