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Duplex redundant system for use in e.g. microcontroller used with banking system, has comparator receiving two delayed output signatures and generating error signal with state based on comparison of output signatures
Duplex redundant system for use in e.g. microcontroller used with banking system, has comparator receiving two delayed output signatures and generating error signal with state based on comparison of output signatures
The system (100) has a signature generator (106) receiving a binary output signal from a master part (102) to generate an output signature. Another clock delay (114) receives the output signature and generates a delayed output signature. A checker part (104) receives a delayed input signal from a clock delay (112) to generate a delayed binary output signal that is received by another signature generator (108) to generate another delayed output signature. A comparator (110) receives the delayed signatures to generate an error signal with a state based on comparison of the delayed signatures. The comparator is a self-testing comparator (STC). The master part is a CPU. Independent claims are also included for the following: (1) a method for performing signature-based redundancy comparison (2) a system for performing signature-based redundancy comparison.
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