首页> 外国专利> ADDER SUPPORTING MULTIPLE DATA TYPES, AND METHOD OF SUPPORTING ADDITION AND SUBTRACTION IN MULTIPLE DATA TYPES USING SAID ADDER

ADDER SUPPORTING MULTIPLE DATA TYPES, AND METHOD OF SUPPORTING ADDITION AND SUBTRACTION IN MULTIPLE DATA TYPES USING SAID ADDER

机译:支持多种数据类型的加法器,以及使用所述增量法支持多种数据类型的加法和减法的方法

摘要

PROBLEM TO BE SOLVED: To provide an adder supporting multiple data types, and a method of supporting addition and subtraction in multiple data types using said adder.SOLUTION: An adder supporting multiple data types through controlling carry propagation is disclosed. The adder according to an embodiment includes a plurality of first addition areas to receive operand data, and a plurality of second addition areas to receive control data based on a type of the operand data and an operation type. Each of the plurality of first addition areas includes a predetermined bit unit, and the plurality of second addition areas are arranged alternately with the plurality of first addition areas between the plurality of first addition areas.
机译:解决的问题:提供一种支持多种数据类型的加法器,以及使用所述加法器支持多种数据类型的加法和减法的方法。解决方案:公开了一种通过控制进位传播来支持多种数据类型的加法器。根据实施例的加法器包括:多个第一加法区域,用于接收操作数数据;以及多个第二加法区域,用于基于操作数数据的类型和操作类型来接收控制数据。多个第一加法区域中的每个包括预定位单元,并且多个第二加法区域与多个第一加法区域在多个第一加法区域之间交替布置。

著录项

  • 公开/公告号JP2014146336A

    专利类型

  • 公开/公告日2014-08-14

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO LTD;

    申请/专利号JP20140013824

  • 发明设计人 YOO HYEONG-SUK;KIM SUK JIN;

    申请日2014-01-28

  • 分类号G06F7/506;

  • 国家 JP

  • 入库时间 2022-08-21 16:19:36

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