首页> 外国专利> METHOD FOR MANUFACTURING MACH-ZEHNDER MODULATOR, METHOD FOR MANUFACTURING OPTICAL WAVEGUIDE, AND INSULATION-SEPARATED OPTICAL WAVEGUIDE

METHOD FOR MANUFACTURING MACH-ZEHNDER MODULATOR, METHOD FOR MANUFACTURING OPTICAL WAVEGUIDE, AND INSULATION-SEPARATED OPTICAL WAVEGUIDE

机译:制造Mach-Zehnder调制器的方法,制造光波导的方法以及绝缘隔离的光波导

摘要

PROBLEM TO BE SOLVED: To provide a method for manufacturing a Mach-Zehnder modulator, by which a stepped portion on a side face of an optical waveguide can be decreased.SOLUTION: An insulation film mask 41 has an opening 41b corresponding to an opening 39b of a resist mask 39a. The insulation film mask 41 covers side faces and upper faces of a first portion and a second portion of a waveguide mesa 33 as well as covers side faces of a third portion of the waveguide mesa 33. A second clad layer of the semiconductor waveguide mesa 33 is etched by using the insulation film mask 41 to expose an upper portion of a core layer. In an embodiment of the present invention, the semiconductor waveguide mesa 33 is etched by using SOG (spin on glass) and SiON as a mask until the upper portion of the core layer is exposed. In this process, since the insulation film 35 has no opening other than a portion corresponding to a waveguide top, a first clad layer or an element separation mesa area located below the core layer of the waveguide mesa 33 cannot be etched.
机译:解决的问题:提供一种制造Mach-Zehnder调制器的方法,通过该方法可以减少光波导侧面上的台阶部分。解决方案:绝缘膜掩模41具有对应于开口39b的开口41b。抗蚀剂掩模39a的一部分。绝缘膜掩模41覆盖波导台面33的第一部分和第二部分的侧面和上表面,以及覆盖波导台面33的第三部分的侧面。半导体波导台面33的第二包覆层通过使用绝缘膜掩膜41蚀刻硅衬底以暴露芯层的上部。在本发明的实施例中,通过使用SOG(玻璃旋涂)和SiON作为掩模来蚀刻半导体波导台面33,直到暴露出芯层的上部。在该过程中,由于绝缘膜35除了与波导顶部相对应的部分以外没有开口,因此不能蚀刻位于波导台面33的芯层下方的第一覆层或元件分离台面区域。

著录项

  • 公开/公告号JP2014202815A

    专利类型

  • 公开/公告日2014-10-27

    原文格式PDF

  • 申请/专利权人 SUMITOMO ELECTRIC IND LTD;

    申请/专利号JP20130076996

  • 发明设计人 KITAMURA TAKAMITSU;YAGI HIDEKI;

    申请日2013-04-02

  • 分类号G02F1/017;G02B6/12;

  • 国家 JP

  • 入库时间 2022-08-21 16:18:09

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