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Automatic reset circuit, automatic reset manner, program, automatic reset device and

机译:自动复位电路,自动复位方式,程序,自动复位装置及

摘要

PROBLEM TO BE SOLVED: To provide an automatic reset circuit recovering a system by executing a hardware reset without using an MPU when occurring abnormality unrecoverable unless depending on the hardware reset.;SOLUTION: A power supply voltage settlement circuit 5 outputs a power supply voltage settlement signal 14, and reset signal output means 2 is started by a timer signal 11 outputted from a timer 1 and outputs a reset signal 10. When a computer starts, reset signal output control means 4 controls the reset signal output means 2, and firmware 6 operates the reset signal output control means 4, performs initialization of the timer 1 and a timer setting, and invalidates the timer signal 11. During the operation of the computer, an interruption detecting circuit 7 detects the execution of an interruption process by a lapse of a time of the timer 1 and outputs an interruption handler starting signal 13, and an interruption handler 6 is started by receiving the interruption handler starting signal 13, performs the initialization of the timer 1 and the timer setting, and invalidates the timer signal 11.;COPYRIGHT: (C)2013,JPO&INPIT
机译:解决的问题:提供一种自动复位电路,该故障复位是在发生不可恢复的异常时通过不执行MPU即可执行硬件复位来恢复系统,除非依赖于硬件复位。解决方案:电源电压稳定电路5输出电源电压稳定信号14,并由计时器1输出的计时器信号11启动复位信号输出装置2,并输出复位信号10。当计算机启动时,复位信号输出控制装置4控制复位信号输出装置2和固件6。操作复位信号输出控制装置4,执行计时器1的初始化和计时器设置,并使计时器信号11无效。在计算机的操作过程中,中断检测电路7会随着时间的流逝检测中断处理的执行。计时器1的时间并输出中断处理程序启动信号13,并且通过接收中断处理程序sta来启动中断处理程序6。 rting信号13,执行计时器1的初始化和计时器设置,并使计时器信号11无效。;版权所有:(C)2013,JPO&INPIT

著录项

  • 公开/公告号JP5392858B2

    专利类型

  • 公开/公告日2014-01-22

    原文格式PDF

  • 申请/专利号JP20110052118

  • 发明设计人 松岡 正則;

    申请日2011-03-09

  • 分类号G06F1/24;G06F11/30;G06F15/78;

  • 国家 JP

  • 入库时间 2022-08-21 16:12:50

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