首页> 外国专利> Static verification program, static verification apparatus, and static verification method

Static verification program, static verification apparatus, and static verification method

机译:静态验证程序,静态验证装置和静态验证方法

摘要

A static verification program according to the present invention reads a circuit description and property. In a static verification step, static verification of the circuit description is performed on the basis of the property and the number of states that can be reached and the number of states that is reached are calculated. In a search coverage value calculation step, a search coverage value is calculated on the basis of the number of states that can be reached and the number of states that is reached. In a display step, the search coverage value is displayed in a state in which the search coverage value can be visually checked.
机译:根据本发明的静态验证程序读取电路描述和特性。在静态验证步骤中,根据属性和可达到的状态数量以及所达到的状态数量,对电路描述进行静态验证。在搜索范围值计算步骤中,基于可以达到的状态数量和达到的状态数量来计算搜索范围值。在显示步骤中,以可以目视检查搜索覆盖率的状态显示搜索覆盖率值。

著录项

  • 公开/公告号JP5432069B2

    专利类型

  • 公开/公告日2014-03-05

    原文格式PDF

  • 申请/专利号JP20100135361

  • 发明设计人 下岡 正明;

    申请日2010-06-14

  • 分类号G06F17/50;

  • 国家 JP

  • 入库时间 2022-08-21 16:11:15

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号