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Techniques for incorporating timing jitter and/or amplitude noise into hardware description language-based input stimuli
Techniques for incorporating timing jitter and/or amplitude noise into hardware description language-based input stimuli
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机译:用于将时序抖动和/或幅度噪声合并到基于硬件描述语言的输入刺激中的技术
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摘要
Methods for generating waveforms with realistic transitions, controllable timing jitter, and controllable amplitude noise in a computer-based simulation environment are disclosed. A first method includes obtaining signal information for one or more parallel data signals. In one embodiment, signal information for the one or more parallel data signals is mapped from an HDL format to a new time scale, and during this operation, timing jitter is added independently to the parallel data signals. These jittery parallel data signals may then be returned to the original HDL format, or another format, for simulation. In another embodiment, rather than mapping to a single time vector, information from each signal is modified to have a time scale commensurate with noise and jitter to be added. Timing jitter is superimposed onto each transition, rise and fall times are incorporated, and missing voltage and timing information for each data signal is interpolated into vectors representing the signals. Each data signal may additionally be scaled to one or more true voltage values and filtered. Finally, amplitude noise is added to each signal, and one or more final signals are output to a desired format for simulation.
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