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Active 2-dimensional array structure for parallel testing
Active 2-dimensional array structure for parallel testing
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机译:有源二维阵列结构,用于并行测试
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摘要
A structure and method is provided for testing a 2-dimensional array of electrical devices, such as a 2-dimensional array in the first metal level (M1) of an electronic structure. The method for testing the 2-dimensional array provides a parallel test approach. The test structure provides a plurality of test pad structures to implement the parallel test approach. The test pad structures may include field effect transistors.
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