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Analog fault visualization system and method for circuit designs
Analog fault visualization system and method for circuit designs
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机译:用于电路设计的模拟故障可视化系统和方法
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摘要
An apparatus and method for visualizing faults in a circuit design includes simulating faults for a circuit design in a layout and a schematic, editing the layout and schematic to include the simulated fault, and linking the layout and schematic with the fault simulation.
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