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HIERARCHICAL EQUIVALENCE CHECKING AND EFFICIENT HANDLING OF EQUIVALENCE CHECKS WHEN ENGINEERING CHANGE ORDERS ARE IN AN UNSHARABLE REGISTER TRANSFER LEVEL
HIERARCHICAL EQUIVALENCE CHECKING AND EFFICIENT HANDLING OF EQUIVALENCE CHECKS WHEN ENGINEERING CHANGE ORDERS ARE IN AN UNSHARABLE REGISTER TRANSFER LEVEL
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机译:当工程变更单处于无法共享的注册转让级别时,分层等效检查和等效检查的有效处理
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摘要
An apparatus, a hierarchical method of equivalence checking a circuit design and equivalency checking after engineering change orders in a circuit design are disclosed herein. In one embodiment, a method of equivalence checking includes: (1) receiving a post-engineering change order (ECO) netlist of a first one of the functional blocks, wherein the post-ECO netlist has been verified employing an equivalence checker, (2) generating a top level netlist for the circuit design including the post-ECO netlist and a block netlist for a second one of the multiple functional blocks, (3) generating a top level register transfer level (RTL) for the circuit design including a RTL for the second functional block and (4) performing an equivalency check of the top level RTL to the top level netlist, wherein a RTL for the first functional block and the post-ECO netlist are black boxed for the performing.
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