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FIRDAC with RTZ/RTO voltage-mode elements

机译:具有RTZ / RTO电压模式元件的FIRDAC

摘要

A FIRDAC with a return-to-zero or return-to-open drive uses multiple DACs receiving delayed copies of a digital input data signal to reduce thermal noise and intersymbol interference to produce a summed analog output. The SNR of sigma-delta ADCs using current-source-based DACs is significantly limited by the thermal noise of the DAC current sources. DACs using a switched voltage connected via a resistor or other passive element are quieter, but in a non-return-to-zero configuration tend to suffer from intersymbol interference if used at GHz clock frequencies. The intersymbol interference can be avoided by using a return-to-zero or return-to-open drive using multiple DACs clocked on successive half clock cycles (a finite-impulse-response DAC).
机译:具有归零驱动器或归零驱动器的FIRDAC使用多个DAC来接收数字输入数据信号的延迟副本,以减少热噪声和符号间干扰,以产生求和的模拟输出。使用基于电流源的DAC的sigma-delta ADC的SNR受到DAC电流源的热噪声的极大限制。使用通过电阻器或其他无源元件连接的开关电压的DAC较安静,但在非归零配置下,如果在GHz时钟频率下使用,则往往会受到符号间干扰。通过使用归零驱动器或归零驱动器可以避免符号间干扰,该驱动器使用多个以连续半个时钟周期为时钟源的DAC(有限冲激响应DAC)。

著录项

  • 公开/公告号US8736475B1

    专利类型

  • 公开/公告日2014-05-27

    原文格式PDF

  • 申请/专利权人 BROADCOM CORPORATION;

    申请/专利号US201213646879

  • 发明设计人 JEFFREY HARRISON;

    申请日2012-10-08

  • 分类号H03M1/66;

  • 国家 US

  • 入库时间 2022-08-21 16:02:40

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