High-speed level shifter between low-side logic and high-side logic

摘要

One embodiment of the present invention relates to a level shifter circuit having switchable current mirrors that can be selectively activated and deactivated in a complementary manner to translate differential input signals between logic sides (e.g., to translate a differential input signal received at a low-side to a high-side). A latch is connected to outputs of the switchable current mirrors. The latch is configured to receive a translated output signal from an activated current mirror and drive the other output signal to a complementary value. The latch is also configured to provide the translated output signal to a switching element that deactivates (e.g., turns off) the activated switchable current mirror. Storage of the output signals allows for the current mirrors to remain deactivated until a new input signal is provided to the level shifter circuit, thereby allowing for a reduction in the static power consumption of the level shifter.