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Method and apparatus of maintaining coherency in the memory subsystem of an electronic system modeled in dual abstractions

机译:在双重抽象建模的电子系统的存储子系统中保持一致性的方法和装置

摘要

The present patent document relates to a method and apparatus for maintaining coherency in a memory subsystem of an electronic system modeled in dual abstractions. The portions of the memory subsystem shared between the first abstraction and the second abstraction are shadowed in both abstractions, allowing either abstraction to coherently access memory written by the other. The memory subsystem can also reside solely in a first abstraction, where the second abstraction will synchronize to the first abstraction to access the memory subsystem. Flags associated with memory pages of the memory subsystem are set to indicate which abstraction has most recently updated the memory page. Prior to accessing a memory page, the system will check the flags, copying the contents of the memory in the other abstraction as needed to maintain coherency. The abstractions can operate either synchronously or asynchronously.
机译:本专利文件涉及一种用于在以双重抽象模型化的电子系统的存储子系统中保持一致性的方法和装置。在第一个抽象和第二个抽象之间共享的内存子系统部分在两个抽象中均被遮盖,从而允许任何一个抽象一致地访问由另一个抽象编写的内存。内存子系统也可以仅驻留在第一个抽象中,其中第二个抽象将与第一个抽象同步以访问内存子系统。与存储器子系统的存储器页面相关联的标志被设置为指示哪个抽象最近更新了存储器页面。在访问内存页面之前,系统将检查这些标志,并根据需要以另一抽象形式复制内存内容,以保持一致性。抽象可以同步或异步操作。

著录项

  • 公开/公告号US8793628B1

    专利类型

  • 公开/公告日2014-07-29

    原文格式PDF

  • 申请/专利权人 CADENCE DESIGN SYSTEMS INC.;

    申请/专利号US201313793388

  • 发明设计人 ASHUTOSH VARMA;

    申请日2013-03-11

  • 分类号G06F17/50;

  • 国家 US

  • 入库时间 2022-08-21 16:01:46

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