Implementation of a DV video decoder with a VLIW processor and a variable length decoding unit

摘要

A decoder for decoding a plurality of digital video data is described. In an embodiment, the decoder comprises a DV video decoder for decoding digital video data which is formatted according to the DV standard. The DV video decoder has a Very-Long Instruction Word (VLIW) processor and a variable length decoding unit. The VLIW processor includes a preparser unit for recovering a decoding order of the digital video data so that the variable length decoding unit can process the digital video data. The variable length decoding unit decodes a variable length coding format of the digital video data which has been preparsed by the VLIW processor. Furthermore, the VLIW processor includes a decompression unit for decompressing the digital video data which has been decoded by the variable length decoding unit. In an embodiment, the VLIW processor and the variable length decoding unit are formed on the same semiconductor device.