DETERMINISTIC PSEUDORANDOM SEQUENCE GENERATOR FOR BIT-BY-BIT ENCRYPTION

摘要

A deterministic pseudorandom sequence generator for bit-by-bit encryption comprises first shift register, multiplexor, clock speed generator, counters. In addition it comprises second shift register which synchro input is connected to output of clock speed generator and outputs of second shift register are connected to additional inputs of parallel load of first shift register. Initialization random value forming unit output is connected to third input of EXCLUSIVE OR element. Session key forming unit output is connected to serial input of second shift register. Control unit first output is connected to control input of second shift register, and second output of control unit is connected to reset inputs of first and second counters and to control input of first shift register.