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A FAST MECHANISM FOR ACCESSING 2n±1 INTERLEAVED MEMORY SYSTEM
A FAST MECHANISM FOR ACCESSING 2n±1 INTERLEAVED MEMORY SYSTEM
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机译:一种访问2 n Sup>±1交错存储系统的快速机制
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摘要
A mechanism implemented by a controller enables efficient access to an interleaved memory system that includes M modules, M being (2n + 1) or (2n 1), n being a positive integer number. Upon receiving an address N, the controller performs shift and add/subtract operations to obtain a quotient of N divided by M based on a binomial series expansion of N over M. The controller computes a remainder of N divided by M based on the quotient. The controller then accesses one of the modules in the memory based on the remainder.
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机译:通过控制器实现的机制可以有效访问包含 M I>个模块的交错存储系统,其中 M I>为(2 n Sup> + 1)或( 2 n Sup> 1), n I>是一个正整数。接收到地址 N I>时,控制器执行移位和加/减运算,以基于二项式级数获得 N I>除以 M I>的商 N I>在 M I>上的扩展。控制器根据商计算出 N I>的余数除以 M I>。然后,控制器根据剩余的内容访问存储器中的模块之一。
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