首页> 外国专利> ADVANCED BIT LINE TRACKING IN HIGH PERFORMANCE MEMORY COMPILERS

ADVANCED BIT LINE TRACKING IN HIGH PERFORMANCE MEMORY COMPILERS

机译:高性能存储器编译器中的高级位线跟踪

摘要

A method accurately tracks a bit line maturing time for compiler memory. The method includes enabling a dummy word line (DWL) in response to an internal clock signal (ICLK). The dummy word line is enabled prior to enabling a real word line (WL). A dummy bit line (DBL) is matured in response to enabling of the dummy word line. The dummy bit line matures at a same rate that a real bit line (BL) matures. The method also includes disabling the dummy word line in response to determining a threshold voltage differential based on monitoring maturation of the dummy bit line. The real word line is enabled a predefined delay after enabling of the dummy word line. Similarly, the word line is disabled the predefined delay after disabling of the dummy word line. In response to disabling the dummy word line, a sense enable signal is generated.
机译:一种方法可以准确地跟踪编译器存储器的位线成熟时间。该方法包括响应于内部时钟信号(ICLK)而使能伪字线(DWL)。在启用真实字线(WL)之前,先启用虚拟字线。响应于伪字线的使能,伪位线(DBL)成熟。伪位线以与真实位线(BL)成熟的速率相同的速率成熟。该方法还包括响应于基于监视虚拟位线的成熟来确定阈值电压差来禁用虚拟字线。在启用伪字线之后,以预定的延迟启用实字线。类似地,在禁用伪字线之后,将字线禁用预定义的延迟。响应于禁用伪字线,产生感测使能信号。

著录项

  • 公开/公告号EP2263234B1

    专利类型

  • 公开/公告日2014-04-30

    原文格式PDF

  • 申请/专利权人 QUALCOMM INC;

    申请/专利号EP20090718832

  • 发明设计人 CHEN ZHIQIN;CHEN NAN;JUNG CHANGHO;

    申请日2009-02-27

  • 分类号G11C7/08;G11C7/14;G11C7/22;

  • 国家 EP

  • 入库时间 2022-08-21 15:50:31

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