首页> 外国专利> Tile sub-array and related circuits and techniques

Tile sub-array and related circuits and techniques

机译:瓦片子阵列及相关电路和技术

摘要

A method of manufacturing a multi-layer circuit board assembly from a plurality of printed circuit boards is described. Circuits on layers of at least two printed circuit boards are electrically connected by plated via holes drilled through the joined printed circuit board assembly. RF matching pads provided on at least one of the circuits are used to provide the desired insertion loss and impedance characteristics over the desired RF operating frequency band. The need to perform back-drill and back-fill operations can be eliminated by the method described.
机译:描述了一种由多个印刷电路板制造多层电路板组件的方法。至少两个印刷电路板的层上的电路通过在连接的印刷电路板组件上钻孔的电镀通孔电连接。设置在至少一个电路上的RF匹配垫用于在期望的RF工作频带上提供期望的插入损耗和阻抗特性。通过所描述的方法可以消除执行反向钻进和回填操作的需要。

著录项

相似文献

  • 专利
  • 外文文献
  • 中文文献
获取专利

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号