Processor resource and execution protection methods and apparatus

摘要

Embodiments include processing systems (110) that determine (308), based on an instruction address range indicator stored in a first register (132, 212), whether a next instruction fetch address corresponds to a location within a first memory region (216, 218) associated with a current privilege state or within a second memory region (216, 218) associated with a different privilege state. When the next instruction fetch address is not within the first memory region (216, 218), the next instruction is allowed to be fetched (314) only when a transition to the different privilege state is legal (310). In a further embodiment, when a data access address is generated for an instruction (316), a determination is made (320), based on a data address range indicator stored in a second register (133, 222), whether access to a memory location corresponding to the data access address is allowed. The access is allowed (318) when the current privilege state is a privilege state in which access to the memory location is allowed.