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Balanced stress assembly for semiconductor devices with one or more devices bonded on both sides to lead frames, the other sides of the lead frames being bonded to AlN, Al2O3 or Si3N4 substrates
Balanced stress assembly for semiconductor devices with one or more devices bonded on both sides to lead frames, the other sides of the lead frames being bonded to AlN, Al2O3 or Si3N4 substrates
An assembly (10) for packaging one or more electronic devices (12) in die form includes substrates (26, 34) on opposite sides of the assembly (10), with lead frames (42, 60) between the electronic devices (12) and the substrates (26, 34). The substrates (26, 34), lead frames (42, 60) and electronic devices (12) are sintered together using silver-based sintering paste (68, 70, 72, 74) between the one or more electronic devices (12) and the lead frames (42, 60) and between the lead frames (42, 60) and the substrates (26, 34). The material and thicknesses of the substrates (26, 34) and lead frames (42, 60) are selected so that stresses experienced by the electronic devices (12) caused by changes in temperature of the assembly (10) are balanced from the centre of the assembly (10), thereby eliminating the need for balancing stresses at a substrate level by applying substantially matching metal layers to both sides of the substrates.
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