HARDWARE-SOFTWARE PARTITIONING TOOL FOR RECONFIGURABLE SYSTEM

摘要

One of hardware-software partitioning issues, which must be reflected on a reconfigurable system, is to classify functions, which is used when application programs are executed in the reconfigurable system, into functions to be performed by a main processor and functions to be performed through a field programmable gateway array (FPGA) considering the limitations of the system so that the given application programs can produce the highest throughput. The present invention suggests a method of solving the problems through a Y-Chart design space search scheme and a simulation tool for the same. According to the method, a mapping set, which is formed by mapping the application program functions to the main processor or the FPGAs belonging to hardware elements by using given hardware element models and application program models, is created, and the created mapping cases are simulated, so that the throughput degree of the system is shown in the mapping case. Accordingly, the mapping case having the highest throughput with respect to the application program can be selected. In addition, the mapping set can be reduced according to the relationship between the workload and the parallelism shown in the reconfigurable system, so that the time required for the simulation can be reduced, which is called a heuristic method.