0-1 balance management in the semiconductor disk controller

摘要

An SSD controller is read from the SLC NVM (or more sub-pages of the MLC) 0 of counts and one count of each reading unit, and / or in some embodiments, it will maintain the 0/1 mismatch count. In some, because of the shift away from the nominal distribution of the threshold voltage distribution, in the uncorrectable events readout unit, count to be maintained to keep track of the threshold voltage shift, to restore the 0/1 balance of the read data It makes it possible to determine the direction and / or size to adjust the read-out threshold for. In various embodiments, a number of the described factors (the threshold voltage is determined distribution, the value is known stored past NVM operation event) adjusted in a manner that is based on, are different description (count, percentage) read threshold to be is determined. Extension of the aforementioned techniques for MLC memories are described.BACKGROUND 4