首页> 外国专利> SYSTEM FOR AND METHOD OF TUNING CLOCK NETWORKS CONSTRUCTED USING VARIABLE DRIVE-STRENGTH CLOCK INVERTERS WITH VARIABLE DRIVE-STRENGTH CLOCK DRIVERS BUILT OUT OF SMALLER SUBSET OF BASE CELLS

SYSTEM FOR AND METHOD OF TUNING CLOCK NETWORKS CONSTRUCTED USING VARIABLE DRIVE-STRENGTH CLOCK INVERTERS WITH VARIABLE DRIVE-STRENGTH CLOCK DRIVERS BUILT OUT OF SMALLER SUBSET OF BASE CELLS

机译:使用可变驱动强度时钟驱动器和可变驱动强度时钟驱动器构建的时钟网络调整的系统和方法,所述可变驱动强度时钟驱动器基于基本单元的较小子集

摘要

PROBLEM TO BE SOLVED: To reduce the cost and manufacturing time for fabricating a clock distribution network comprising variable drive-strength clock drivers.SOLUTION: A system for tuning an integrated circuit design comprises: a processor; a synthesis module configured to generate a collection of macrocells instantiated in the integrated circuit design, where the integrated circuit design has a plurality of drivers for driving capacitive loads on the integrated circuit; a place-and-route module configured to choose locations for input and output net lists of each of the macrocells, generate terminals marking the locations, and determine names of the terminals and pins for the macrocells; and a verification module configured to tune the integrated circuit by balancing a capacitive load on the plurality of drivers according to predetermined criteria.
机译:要解决的问题:为了减少制造包括可变驱动强度时钟驱动器的时钟分配网络的成本和制造时间。合成模块,被配置为生成在集成电路设计中实例化的宏单元的集合,其中,集成电路设计具有多个驱动器,用于驱动集成电路上的电容性负载;布局布线模块,配置为每个宏单元的输入和输出网表选择位置,生成标记该位置的端子,并确定该宏单元的端子和引脚的名称;验证模块,其配置为通过根据预定标准平衡多个驱动器上的电容性负载来调谐集成电路。

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