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EXECUTION OF DATA-PARALLEL PROGRAMS ON COARSE-GRAINED RECONFIGURABLE ARCHITECTURE HARDWARE
EXECUTION OF DATA-PARALLEL PROGRAMS ON COARSE-GRAINED RECONFIGURABLE ARCHITECTURE HARDWARE
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机译:粗粒度可重构体系结构硬件上的数据并行程序的执行
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摘要
A GPGPU-compatible architecture combines a coarse-grain reconfigurable fabric (CGRF) with a dynamic dataflow execution model to accelerate execution throughput of massively thread-parallel code. The CGRF distributes computation across a fabric of functional units. The compute operations are statically mapped to functional units, and an interconnect is configured to transfer values between functional units.
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