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High speed phase selector with a glitchless output used in phase locked loop applications
High speed phase selector with a glitchless output used in phase locked loop applications
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机译:具有锁相环应用中的无毛刺输出的高速相位选择器
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摘要
A digital phase selector circuit that switches an output clock between N input clock phases is described. The phase selector utilizes a special output mux and switches clock phases during a safe zone to avoid glitches. The phase selector is used in the feedback path of a PLL to implement functions such as spread spectrum or fractional reference clocks. An example with N=4 and an optimized latch mux is shown.
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