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Deterministic finite automata graph traversal with nodal bit mapping
Deterministic finite automata graph traversal with nodal bit mapping
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机译:具有节点位映射的确定性有限自动机图遍历
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摘要
An apparatus, and corresponding method, for generating a graph used in performing a search for a match of at least one expression in an input stream is presented. The graph includes a number of interconnected nodes connected solely by valid arcs. A valid arc may also include a nodal bit map including structural information of a node to which the valid arc points to. A walker process may utilize the nodal bit map to determine if a memory access is necessary. The nodal bit map reduces the number of external memory access and therefore reduces system run time.
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