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EEPROM-based, data-oriented combo NVM design

机译:基于EEPROM的,面向数据的组合NVM设计

摘要

A nonvolatile memory device has a combination of FLOTOX EEPROM nonvolatile memory arrays. Each FLOTOX-based nonvolatile memory array is formed of FLOTOX-based nonvolatile memory cells that include at least one floating gate tunneling oxide transistor such that a coupling ratio of the control gate to the floating gate of the floating gate tunneling oxide transistor is from approximately 60% to approximately 70% and a coupling ratio of the floating gate to the drain region of the floating gate tunneling oxide transistor is maintained as a constant of is from approximately 10% to approximately 20% and such that a channel length of the channel region is decreased such that during the programming procedure a negative programming voltage level is applied to the control gate and a moderate positive programming voltage level is applied to the drain region to prevent the moderate positive programming voltage level from exceeding a drain-to-source breakdown voltage.
机译:非易失性存储设备具有FLOTOX EEPROM非易失性存储阵列的组合。每个基于FLOTOX的非易失性存储器阵列由包括至少一个浮栅隧穿氧化物晶体管的基于FLOTOX的非易失性存储器单元形成,使得控制栅与浮栅隧穿氧化物晶体管的浮栅的耦合比为大约60。 %至约70%,并且将浮动栅极与浮动栅极隧穿氧化物晶体管的漏极区域的耦合比保持为从大约10%至大约20%的常数,并且使得沟道区域的沟道长度为1%。减小,使得在编程过程中,将负编程电压电平施加到控制栅极,并且将适度的正编程电压电平施加到漏极区域,以防止适度的正编程电压电平超过漏极至源极的击穿电压。

著录项

  • 公开/公告号US8933500B2

    专利类型

  • 公开/公告日2015-01-13

    原文格式PDF

  • 申请/专利权人 PETER WUNG LEE;FU-CHANG HSU;

    申请/专利号US201113200010

  • 发明设计人 PETER WUNG LEE;FU-CHANG HSU;

    申请日2011-09-15

  • 分类号H01L29/788;H01L21/28;G11C16/04;G11C16/10;H01L27/115;H01L29/423;

  • 国家 US

  • 入库时间 2022-08-21 15:19:29

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