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Data processing apparatus and control method for controlling clock frequency based on calculated frequency-to-response-time ratios

机译:用于基于计算出的频率响应时间比来控制时钟频率的数据处理设备和控制方法

摘要

A data processing apparatus includes: a plurality of processing units adapted to process data according to input operation clocks; and a control unit adapted to measure response times of the plurality of processing units when the operation clocks of a common frequency are supplied to the plurality of processing units, and to control a frequency of the operation clocks to be supplied to at least one of the plurality of processing units so that a plurality of measured response times become closer to each other.
机译:一种数据处理设备,包括:多个处理单元,适于根据输入的操作时钟来处理数据;以及控制单元,其适于在将公共频率的操作时钟提供给所述多个处理单元时测量所述多个处理单元的响应时间,并控制要提供给所述处理单元中的至少一个的操作时钟的频率。多个处理单元,从而多个测得的响应时间变得更接近。

著录项

  • 公开/公告号US8972769B2

    专利类型

  • 公开/公告日2015-03-03

    原文格式PDF

  • 申请/专利权人 AKIO NAKAGAWA;HISASHI ISHIKAWA;

    申请/专利号US201113011712

  • 发明设计人 AKIO NAKAGAWA;HISASHI ISHIKAWA;

    申请日2011-01-21

  • 分类号G06F1/04;G06F15/16;G06F9/30;G06F9/40;G06F9;G06F1/32;

  • 国家 US

  • 入库时间 2022-08-21 15:17:16

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