首页> 外国专利> GATE DRIVE CIRCUIT AND INVERTER SYSTEM HAVING GATE DRIVE CIRCUIT MOUNTED THEREIN

GATE DRIVE CIRCUIT AND INVERTER SYSTEM HAVING GATE DRIVE CIRCUIT MOUNTED THEREIN

机译:在其中安装了门极驱动电路的门极驱动电路和逆变器系统

摘要

For the purpose of shortening a dead time in a semiconductor element gate drive circuit and an inverter system having the gate drive circuit mounted therein, a gate drive circuit (100U) of the present invention is provided with: a PWM drive signal generating circuit (110U); a gate resistor (120U); a differential amplifier circuit (130U) for performing differential amplification of a voltage applied to the gate resistor (120U); an RS-type flip-flop circuit (140U); a differential amplifier (150U) for performing differential amplification of an output voltage of the RS-type flip-flop circuit (140U); and an MOSFET (160U) that turns on/off by means of signals of the differential amplifier (150U). In the cases where a voltage applied to the gate resistor (120U) is detected during a period when the PWM signal is in the off-state, the MOSFET (160U) is turned on, and an upper arm MOSFET (SiC-MOSFET) (S1U) using SiC is driven to turn on.
机译:为了缩短半导体元件栅极驱动电路和其中安装有栅极驱动电路的逆变器系统中的死区时间,本发明的栅极驱动电路(100U)具有:PWM驱动信号生成电路(110U)。 );栅极电阻(120U);差分放大电路(130U),用于对施加给栅极电阻(120U)的电压进行差分放大。 RS型触发器电路(140U);差分放大器(150U),用于对RS型触发器电路(140U)的输出电压进行差分放大。 MOSFET(160U)通过差动放大器(150U)的信号进行导通/截止。在PWM信号处于关闭状态的时间段内检测到施加到栅极电阻(120U)的电压的情况下,MOSFET(160U)导通,上臂MOSFET(SiC-MOSFET)(驱动使用SiC的S1U)导通。

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