A double-loop control circuit of a phase-shift full-bridge synchronous rectification circuit. Input signals include an output voltage signal (Vc) of the phase-shift full-bridge synchronous rectification circuit and two bus current sampling signals (I1, I2), and the feedback current in a current loop is an average of two bus sampling currents. A voltage loop phase-shift value (UPsft) and a current loop phase-shift value (IPsft) are respectively obtained through PI calculation of a voltage loop and the current loop, and the smaller one of the voltage loop phase-shift value (UPsft) and the current loop phase-shift value (IPsft) is used as a reference phase-shift value (BPsft) for magnetic bias control; a magnetic bias state control module is arranged, and a positive bias modification value (△AD) and a negative bias modification value (ΔBC) are output according to the two bus current sampling signals; after the difference between the reference phase-shift value and the positive bias modification value and the difference between the reference phase-shift value and the negative bias modification value are obtained, two phase-shift values (Psft1, Psft2) of a finally-output PWM signal are obtained, and phase-shift values in positive and negative semi-cycle energy transmitting periods of the PWM signal are respectively adjusted to enable voltage-second products in the positive and negative semi-cycle periods to be same. Different voltages at two ends of a main transformer are compensated, the aim of controlling magnetic biases is achieved, a hardware circuit is slightly changed, and implementation is conveniently achieved.
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