首页> 外国专利> Semiconductor device with a bonding layer with a region comprising Ti and a region comprising Sn but with substantially no region comprising both Ti and Sn and method for manufacturing the same

Semiconductor device with a bonding layer with a region comprising Ti and a region comprising Sn but with substantially no region comprising both Ti and Sn and method for manufacturing the same

机译:具有结合层的半导体器件及其制造方法,该半导体器件具有结合层,该结合层具有包含Ti的区域和包含Sn的区域,但是基本上不包含包含Ti和Sn的区域

摘要

According to one embodiment, a semiconductor device (110) includes a semiconductor element (20), a mounting member (70) including Cu, and a bonding layer (50) provided between the semiconductor element (20) and the mounting member (70). The bonding layer (50) includes a first region (R1) including Ti and Cu, and a second region (R2) provided between the first region (R1) and the mounting member (70), and including Sn and Cu. A first position (P1) along the first direction is positioned between the semiconductor element (20) and a second position (P2) along the first direction. The first position (P1) is where the composition ratio (51r) of Ti in the first region (R1) is 0.1 times a maximum value (51x) of the composition ratio (51r) of Ti. The second position (P2) is where the composition ratio (52r) of Sn in the second region (R2) is 0.1 times a maximum value (52x) of the composition ratio (52r) of Sn. A distance (L1) between the first position (P1) and the second position (P2) is not less than 0.1 micrometres.According to another embodiment, a semiconductor device (120) includes a semiconductor element (20), a mounting member (70) including Cu, a first layer (41) provided between the semiconductor element (20) and the mounting member (70), the first layer (41) including Ti, a second layer (42) provided between the first layer (41) and the mounting member (70), the second layer (42) including Sn and Cu and a third layer (43) provided between the first layer (41) and the second layer (42), the third layer (43) including at least one selected from Ni, Pt, and Pd.In both embodiments, the semiconductor device (110, 120) is formed by bonding the semiconductor element (20) to the mounting member (70) by solid solution bonding.Thereby, a semiconductor device (110, 120) having good heat dissipation and high productivity can be provided.
机译:根据一个实施例,一种半导体器件(110)包括:半导体元件(20);包含铜的安装构件(70);以及设置在半导体元件(20)和安装构件(70)之间的结合层(50)。 。接合层(50)包括:第一区域(R1),其包括Ti和Cu;以及第二区域(R2),其设置在第一区域(R1)和安装构件(70)之间,并且包括Sn和Cu。沿着第一方向的第一位置(P1)位于半导体元件(20)和沿着第一方向的第二位置(P2)之间。第一位置(P1)是第一区域(R1)中的Ti的组成比(51r)是Ti的组成比(51r)的最大值(51x)的0.1倍的位置。第二位置(P2)是第二区域(R2)中的Sn的组成比(52r)是Sn的组成比(52r)的最大值(52x)的0.1倍的位置。第一位置(P1)和第二位置(P2)之间的距离(L1)不小于0.1微米。根据另一实施例,一种半导体器件(120)包括:半导体元件(20);包含铜的安装构件(70);设置在半导体元件(20)和安装构件(70)之间的第一层(41);第一层(41)包括Ti,第二层(42)设置在第一层(41)和安装构件(70)之间,第二层(42)包括Sn和Cu,第三层(43)设置在第一层和第二层之间。第一层(41)和第二层(42),第三层(43)包括选自Ni,Pt和Pd中的至少一个。在两个实施例中,通过固溶结合将半导体元件(20)结合到安装构件(70),从而形成半导体器件(110、120)。从而,可以提供具有良好的散热性和高生产率的半导体器件(110、120)。

著录项

  • 公开/公告号EP2858107A3

    专利类型

  • 公开/公告日2015-10-21

    原文格式PDF

  • 申请/专利权人 KABUSHIKI KAISHA TOSHIBA;

    申请/专利号EP20140176759

  • 发明设计人 MATSUSHITA KEIICHI;SASAKI YO;

    申请日2014-07-11

  • 分类号H01L23/373;H01L21/58;H01L23/10;H01L21/50;

  • 国家 EP

  • 入库时间 2022-08-21 15:03:05

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