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LARGE SIZED SILICON INTERPOSERS OVERCOMING THE RETICLE AREA LIMITATIONS

机译:大型硅中介层克服了掩模版的局限性

摘要

A multi-die integrated circuit assembly includes an interposer substrate larger than the typical reticle size used in fabricating the "active area" in which the through-silicon vias (TSVs) and interconnect conductors are formed in the interposer. At the same time, each of the dies has its external power/ground and I/O signal line connections concentrated into a smaller area of the die. The dies are disposed or mounted on the interposer such that these smaller areas (with the power/ground/IO connections) overlap with the active area of the interposer. In this configuration, a plurality of dies having a combined area substantially greater than the active area of the interposer can be mounted on the interposer (and take advantage of the active area for interconnections).
机译:多管芯集成电路组件包括插入物基板,该插入物基板大于用于制造“有源区”的典型掩模版尺寸,在该有源区中,在插入物中形成了硅通孔(TSV)和互连导体。同时,每个管芯的外部电源/接地和I / O信号线连接都集中在管芯的较小区域。将管芯放置或安装在插入器上,以使这些较小的区域(具有电源/接地/ IO连接)与插入器的有效区域重叠。在这种配置中,可以将具有实质上大于插入件的有效面积的组合面积的多个管芯安装在插入件上(并且利用有效面积进行互连)。

著录项

  • 公开/公告号EP2873096A4

    专利类型

  • 公开/公告日2015-09-09

    原文格式PDF

  • 申请/专利权人 HUAWEI TECHNOLOGIES CO. LTD.;

    申请/专利号EP20130820133

  • 发明设计人 MOHAMMED ANWAR;NIU RUI;WEI CAO;SONG HAOYU;

    申请日2013-07-17

  • 分类号H01L23/48;H01L23/14;H01L23/538;H01L25/065;

  • 国家 EP

  • 入库时间 2022-08-21 15:02:45

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