A method for synchronizing a data processing system and thus a synchronized data processing system

摘要

A method for synchronizing a data processing system to a temporally be developed date. The system contains a plurality of modules (1, 2, 3, 4), whereby each of a plurality of processors (10, 11, 12, 13, 20, 21, 22, 23) by a separate clock generator of this module are clocked. Each processor contains a private register tbr (16, 17, 18, 19, 26, 27, 28, 29), which holds a value of the date and by means of which the processor module containing separate clock generator is incremented. A processor is selected as the master, which each other processor such that it is in a ready-to-use state, in which each processor to a from the master - processor of the system waits originating release, without having to be able to be interrupted. Each released immediately processor reads the contents of a register tbc (50, 51), which is common to the processors of the same module, and writes these contents in the register tbr, without to be able to be interrupted.