Microprocessor that performs X86 ISA and ARM ISA machine language program instructions by hardware translation into microinstructions executed by common execution pipeline

摘要

A microprocessor includes a hardware instruction translator that translates x86 ISA and ARM ISA machine language program instructions into microinstructions. An execution pipeline executes the microinstructions to generate x86/ARM-defined results. An indicator indicates either x86 or ARM as a boot ISA. After reset, the microprocessor initializes its architectural state, fetches its first instructions from a reset address, and translates them, all according to the boot ISA.